Wednesday, December 7, 2011

IEDM 2011: IBM displays via-middle TSV process for die stacking

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A few days after IBM and Micron publicized their hybrid memory cube , IBM gave their TSV paper at IEDM on the Monday afternoon (paper 7.1). ...
Tuesday, November 29, 2011

IEDM 2011 Preview

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Next week the researchers and practitioners of the electron device world will be gathering in Washington D.C. for the 2011 IEEE Internation...
Monday, November 21, 2011

Intel clarifies 32nm NMOS stress mechanism at IEDM 2011

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I was browsing through the advance program for the upcoming IEDM conference when, almost at the end, I came across paper number 34.4, ...
Tuesday, October 4, 2011

GlobalFoundries takes a different approach to HKMG in AMD’s Llano CPU/GPU

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After much anticipation, and with quite a few design wins, AMD's Llano CPU/GPU chip arrived on the scene a couple of months ago. Fabrica...
Wednesday, September 14, 2011

Intel Enlarges Process Lead over Their Competition

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22-nm Trigate Transistors Discussed At a morning session at the Intel Developer Forum Tuesday, Mark Bohr tooted the Intel trumpet and put ...
Friday, July 22, 2011

A SEMICON West snippet: AMAT launches new products, prepares for 450mm

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SEMICON West is usually taken as a barometer for the industry, and my subjective impression is steaming along nicely, but no record breaking...
Tuesday, July 12, 2011

TSMC HKMG is Out There!

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I have to apologise for a hiatus in posting due to pressure from the day job, but this week is Semicon West week, so it seems appropriate t...